Matrix_Convolution_Zynq_based_SoC is an SoC on Xilinx Zynq integrating an ARM Cortex-A9 with an FPGA-based matrix convolution accelerator. Data transfers use AXI-Stream/AXI-Lite and DMA. Pipelining and tiling optimize large-matrix processing for low latency and high throughput. - View it on GitHub