ScaleDisturb is a new DRAM access pattern that can amplify DRAM read disturbance by asymmetrically extending the open time of two aggressor rows. This repository provides the artifact for the DSN'26 paper "ScaleDisturb: Exploiting Temporal Asymmetry to Amplify Read Disturbance in Modern DRAM Chips." Described in https://arxiv.org/abs/2606.07761 - View it on GitHub